Crosstalk suppression in mixed-mode ICs by the π technology and the future with an SOC integration platform:: Particle-beam stand (PBS)

被引:6
作者
Liao, CP [1 ]
Liu, MN
Juang, KC
机构
[1] ARBL, Taichung 407, Taiwan
[2] ITRI, STC, Hsinchu 310, Taiwan
关键词
coupling; deep-level defect; isolation; mixed-mode; system-on-a-chip (SOC);
D O I
10.1109/TED.2003.810476
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A pi technology (particle-enhanced isolation, PEI) is proposed to employ penetrating proton beams on the already manufactured mixed-mode (analog-digital) IC wafers (prior to packaging) for the suppression of undesirable substrate coupling. Results indicated that an improvement of 25-30 dB could be achieved by applying a relatively low-fluence proton bombardment on the isolation-intended region in a metal pads pattern. Hall measurements of the irradiated spots were conducted and the associated physics are elaborated on. Issues relevant to the commercial-scale implementation of this technology are also pointed out and discussed. Finally, a pi-technology-based post-very large scale integration (VLSI) concept: the "particle-beam stand" (PBS) is promoted, which, especially with its design rules pushed to the front end, can potentially serve as the general system-on-a-chip (SOC) integration platform and end most mixed-mode and RF SOC development difficulties. New information about PBS-rendered Q-improvement for RF passives may be found in an accompanying work of the authors, also appearing in this special issue.
引用
收藏
页码:764 / 768
页数:5
相关论文
共 8 条
[1]   FOLDED SOURCE-COUPLED LOGIC VS CMOS STATIC LOGIC FOR LOW-NOISE MIXED-SIGNAL ICS [J].
ALLSTOT, DJ ;
CHEE, SH ;
KIAEI, S ;
SHRIVASTAWA, M .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 1993, 40 (09) :553-563
[2]   A SIMPLE APPROACH TO MODELING CROSS-TALK IN INTEGRATED-CIRCUITS [J].
JOARDAR, K .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (10) :1212-1219
[3]   Isolation on Si wafers by MeV proton bombardment for RF integrated circuits [J].
Lee, LS ;
Liao, CP ;
Lee, CL ;
Huang, TH ;
Tang, DDL ;
Duh, TS ;
Yang, TT .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (05) :928-934
[4]   Method of creating local semi-insulating regions on silicon wafers for device isolation and realization of high-Q inductors [J].
Liao, CP ;
Huang, TH ;
Lee, CY ;
Tang, D ;
Lan, SM ;
Yang, TN ;
Lin, LF .
IEEE ELECTRON DEVICE LETTERS, 1998, 19 (12) :461-462
[5]  
RAHIM I, 1992, P IEEE INT SOI C, P170
[6]   EXPERIMENTAL RESULTS AND MODELING TECHNIQUES FOR SUBSTRATE NOISE IN MIXED-SIGNAL INTEGRATED-CIRCUITS [J].
SU, DK ;
LOINAZ, MJ ;
MASUI, S ;
WOOLEY, BA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (04) :420-430
[7]  
Sze S., 1981, PHYS SEMICONDUCTOR D, P68
[8]  
Verghese N. K., 1995, SIMULATION TECHNIQUE