Impact of soft and hard breakdown on analog and digital circuits

被引：21

作者：

Avellán, A ^{[1
]}

Krautschneider, WH ^{[1
]}

机构：

[1] Tech Univ Hamburg, Inst Mikroelekt, D-21071 Hamburg, Germany

来源：

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY | 2004年 / 4卷 / 04期

关键词：

analog circuits; dielectric breakdown; digital circuits; modeling; MOSFETs;

D O I：

10.1109/TDMR.2004.836729

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The influence of gate oxide breakdown of one MOS transistor on the functionality of simple analog and digital circuits is studied. The main changes in, the transistor behavior such as the additional gate current as well as transconductance and threshold voltage degradation are pointed out and their respective impact on circuit characteristics is analyzed. With this approach, it is possible to identify critical transistors during the, design stage and implement appropriate countermeasures. Depending on the application, some circuits may be, functional even after breakdown of one of their transistors.

引用

页码：676 / 680

页数：5

共 50 条

[21] Time-dependent dielectric breakdown (TDDB) reliability analysis of CMOS analog and radio frequency (RF) circuits
Sanic, Mustafa Tarik
Yelten, Mustafa Berke
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2018, 97 (01) : 39 - 47
[22] On the complexity of encoding in analog circuits
Wegener, I
INFORMATION PROCESSING LETTERS, 1996, 60 (01) : 49 - 52
[23] Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability
Kaczer, B
Degraeve, R
Rasras, M
Van de Mieroop, K
Roussel, PJ
Groeseneken, G
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (03) : 500 - 506
[24] SBT soft fault diagnosis in analog electronic circuits: A sensitivity-based approach by randomized algorithms
Alippi, C
Catelani, M
Fort, A
Mugnaini, M
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2002, 51 (05) : 1116 - 1125
[25] 1GigaRad TID Impact on 28nm HEP Analog Circuits
Resta, F.
Gerardin, S.
Mattiazzo, S.
Paccagnella, A.
De Matteis, M.
Enz, C.
Baschirotto, A.
2017 13TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME), 2017, : 225 - 228
[26] All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits
Drego, Nigel
Chandrakasan, Anantha
Boning, Duane
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45 (03) : 640 - 651
[27] Coexisting Multiple Attractors in a Fourth Order Chua's Circuit With Experimental Verifications by Analog and Digital Circuits
Zhu, Lei
Pan, Minghai
IEEE ACCESS, 2021, 9 : 96671 - 96681
[28] An Efficient Double Deep Q Learning Network-Based Soft Faults Detection and Localization in Analog Circuits
Puvaneswari, G.
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2024, 33 (13)
[29] Catastrophic Faults Detection of Analog Circuits
Arabi, Abderrazak
Bourouba, Nacerdine
Belaout, Abdesslam
Ayad, Mouloud
2015 7th International Conference on Modelling, Identification and Control (ICMIC), 2014, : 186 - 191
[30] Constraints generation for analog circuits layout
Hao, QS
Dong, SQ
Chen, S
Hong, XL
Su, Y
Qu, ZY
2004 INTERNATIONAL CONFERENCE ON COMMUNICATION, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS, 2004, : 1339 - 1343

← 1 2 3 4 5 →