Cadmium sulfide thin-film transistors fabricated by low-temperature chemical-bath deposition

In this paper, we report the characterization and analysis of the dc electrical characteristics of thin-film transistors fabricated from low-temperature chemical-bath-deposited CdS as the channel layer. Our analysis shows that the device can be operated either in the depletion mode or in the accumulation mode. In the depletion mode, the channel lies completely within the bulk of the CdS layer. In the accumulation mode, the current is carried by an accumulation channel at the SiO2/CdS interface and a buried channel that lies in the bulk of the CdS layer. Using our device analysis, we have extracted the threshold voltage, the carrier concentration in CdS, and the carrier mobility in the bulk channel as well as in the surface channel. The extracted value of the surface channel mobility is found to be greater than 1 cm(2)/V s, which shows that the CdS deposited by this method has a great promise for applications that require low-temperature processing (e.g., in plastic electronics). (C) 2004 American Institute of Physics.