Enhancing embedded processors with specific instruction set extensions for network applications

被引：3

作者：

Chormoviti, A. ^{[1
]}

Vassiliadis, N. ^{[1
]}

Theodoridis, G. ^{[1
]}

Nikolaidis, S. ^{[1
]}

机构：

[1] Aristotle Univ Thessaloniki, Dept Phys, Sect Elect & Comp, GR-54124 Thessaloniki, Greece

来源：

2005 IEEE INTELLIGENT DATA ACQUISITION AND ADVANCED COMPUTING SYSTEMS: TECHNOLOGY AND APPLICATIONS | 2005年

关键词：

ASIP design; instruction set extensions; network applications;

D O I：

10.1109/IDAACS.2005.282969

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The bandwidth explosion of last years and its dropping cost have resulted in bandwidth-hungry and computationally intensive applications. To effectively handle current and future applications, networks will need to support new protocols that should include differentiated services, security, and various network management functions. In order to satisfy the new requirements, an Application Specific Instruction Set Processor (ASIP), derived from the extension of a popular MIPS embedded processor, is proposed in this paper. An efficient instruction set extended properly for network applications is introduced Experimental results on Netbench, a benchmarking suite for network applications, prove that the proposed instruction set presents remark-able performance and power improvements over the ARM7TDMI and MIPS processors.

引用

页码：199 / 203

页数：5

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