Equivalent Circuit Extraction of Solder Bumps Using a Single Calibration Component for Millimeter-Wave Packaging Applications

Recently, the millimeter-wave chip packaging has been a research topic of interest in the fifth generation of wireless communication [1]. The higher operating frequency causes that the parasitic effects of package structures are not negligible anymore and may deteriorate the chip performance. Shorting the electrical length of a package structure is the most straightforward approach to mitigating the packaging effect on chips. The flip-chip structure is widely used as a high-frequency interconnection because of its solder bumps, which can provide a shorter electrical signal path. Hence it is essential to develop the equivalent lumped circuit of the solder bumps. In addition, calibration must be carried out for eliminating the structure effects not induced by the bump interconnection. In this paper, an easily implemented calibration method to extract the equivalent circuits of bump interconnections is proposed. Transitional calibration techniques such as through-reflection-line (TRL) or through-line-line (TLL) need three calibration components, which rises cost and difficulty. Benefitting from the symmetry and reciprocity of the designed flip-chip interconnection, the calibration kit for this design can be composed of a single component. Grounded coplanar waveguide (GCPW) is chosen as the 50. transmission line to connect the solder bumps, and a back-to-back flip-chip transition structure is fabricated and assembled. A T-type equivalent circuit is used to model the bump interconnection after the effect of the GCPW is de-embedded. Theory, simulations, and measurements are detailed in the next section