Hardening silicon-on-insulator nMOSFETs by multiple-step Si+ implantation

被引:8
作者
Huang, Huixiang [1 ]
Huang, YanYang [1 ]
Zheng, Jiachun [1 ]
Wei, Sufen [1 ]
Tang, Kai [1 ]
Bi, Dawei [2 ]
Zhang, Zhengxuan [2 ]
机构
[1] Jimei Univ, Coll Informat Engn, Xiamen 361021, Fujian, Peoples R China
[2] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Funct Mat Informat, Shanghai 200050, Peoples R China
基金
中国国家自然科学基金;
关键词
Total dose radiation; Silicon-on-insulator; Ion implantation; X-ray Diffraction; Radiation hardening by process; ION-IMPLANTATION; RADIATION-DAMAGE; THERMAL OXIDES; BURIED OXIDES; ELECTRON; LAYERS; HOLE; TEMPERATURE; DEFECTS; WAFERS;
D O I
10.1016/j.microrel.2015.12.015
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel technique is proposed to improve total irradiation dose (TID) hardness of buried oxides in a 0.13 mu m silicon-on-insulator (SOI) technology. Multiple-step Si ion implantation is implemented to avoid silicon film amorphization. Each implant step introduces silicon ion implantation of a lower dose into buried oxides which creates an amorphous/crystalline (a/c) interface inside the silicon layer. Rapid thermal annealing (RTA) removes implant-induced lattice damages by silicon recrystallization reflected in a/c interface moving towards the top silicon surface. The thermal process prevents top silicon layers from total amorphization arising in the technique of single high dose implantation method. X-ray Diffraction (XRD) spectrum confirms the existence of the a/c interface and determines the single implant dose. Experimental results on pseudo-MOS and H-gate partially depleted SOI n-type MOSFETs show radiation tolerance up to 1.0 Mrad(Si) though introduced metastable electron traps lead to I-V hysteresis and bias instabilities. (C) 2015 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1 / 9
页数:9
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