Design of 2.5Gb/s transimpedance amplifier using CMOS technologies

被引：0

作者：

Kim, Seung-Hoon ^{[1
]}

Kam, Chi-Uk ^{[1
]}

Lee, Jong-Hwa ^{[1
]}

机构：

[1] Univ Ulsan, Sch Elect Engn, Ulsan 680749, South Korea

来源：

9TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY: TOWARD NETWORK INNOVATION BEYOND EVOLUTION, VOLS 1-3 | 2007年

关键词：

CMOS; regulated cascode (RGC); HSPICE; transimpedance amplifier;

D O I：

10.1109/ICACT.2007.358725

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

Designed RGC TIA circuit was simulated on the basis of 0.25 mu m CMOS process using HSPICE. Supply voltage is 2.5 V. Power consumption of whole circuit is 16mW. Mid-band transimpedance(TIA) gain of TIA is 60.1dB Omega and -3dB bandwidth is satisfied with photodiode capacitance., and the average noise current spectral density of 18.9 pA/sqrt(Hz) . TIA output eye-diagram of 2.5-Gb/s 2(31)-1 PRBS signal. We obtained period of 300ps, wide and clean eye-diagram. Output eye-diagram voltage amplitude of 100 mu A input current signal is equal to 90mVpp. A core size is 210 mu m x 60 mu m.

引用

页码：1825 / +

页数：2

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