Capacitance reconstruction from measured C-V in high leakage, nitride/oxide MOS

被引:38
作者
Choi, CH [1 ]
Wu, Y
Goo, JS
Yu, ZP
Dutton, RW
机构
[1] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
[2] Adv Micro Devices Inc, Sunnyvale, CA 94088 USA
基金
美国国家科学基金会;
关键词
composite nitride/oxide gate dielectrics; C-V reconstruction; MOSFETs; tunneling;
D O I
10.1109/16.870559
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A reconstruction technique of the gate capacitance from anomalous capacitance-voltage (C-V) curves in high leakage dielectric MOSFETs is presented. An RC network is used to accommodate the distributed nature of MOSFETs and an optimization technique is applied to extract the intrinsic gate capacitance. Applicability of the method is demonstrated for ultra-thin nitride/oxide (N/O similar to 1.4 nm/0.7 nm) composite dielectric MOSFETs.
引用
收藏
页码:1843 / 1850
页数:8
相关论文
共 23 条
  • [1] Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFET's
    Ahmed, K
    Ibok, E
    Yeap, GCF
    Xiang, Q
    Ogle, B
    Wortman, JJ
    Hauser, JR
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (08) : 1650 - 1655
  • [2] ARORA N, 1993, MOSFET MODEL VLSI CI
  • [3] *AVANT CORP, 1998, HSPICE US MAN
  • [4] Physical oxide thickness extraction and verification using quantum mechanical simulation
    Bowen, C
    Fernando, CL
    Klimeck, G
    Chatterjee, A
    Blanks, D
    Lake, R
    Hu, J
    Davis, J
    Kulkarni, M
    Hattangady, S
    Chen, IC
    [J]. INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST, 1997, : 869 - 872
  • [5] MOS C-V characterization of ultrathin gate oxide thickness (1.3-1.8 nm)
    Choi, CH
    Goo, JS
    Oh, TY
    Yu, ZP
    Dutton, RW
    Bayoumi, A
    Cao, M
    Vande Voorde, P
    Vook, D
    Diaz, CH
    [J]. IEEE ELECTRON DEVICE LETTERS, 1999, 20 (06) : 292 - 294
  • [6] CHOI CH, 1999, P S VLSI TECHN, P151
  • [7] GENERAL OPTIMIZATION AND EXTRACTION OF IC DEVICE MODEL PARAMETERS
    DOGANIS, K
    SCHARFETTER, DL
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1983, 30 (09) : 1219 - 1228
  • [8] CARRIER TRANSPORT NEAR THE SI/SIO2 INTERFACE OF A MOSFET
    HANSCH, W
    VOGELSANG, T
    KIRCHER, R
    ORLOWSKI, M
    [J]. SOLID-STATE ELECTRONICS, 1989, 32 (10) : 839 - 849
  • [9] Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors
    Henson, WK
    Ahmed, KZ
    Vogel, EM
    Hauser, JR
    Wortman, JJ
    Venables, RD
    Xu, M
    Venables, D
    [J]. IEEE ELECTRON DEVICE LETTERS, 1999, 20 (04) : 179 - 181
  • [10] KANO K, 1998, SEMICONDUCTOR DEVICE