An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers

被引:0
作者
Boora, Aasish [1 ]
Thangarasu, Bharatha Kumar [1 ]
Yeo, Kiat Seng [1 ]
机构
[1] Singapore Univ Technol & Design, Pillar Engn Prod Dev, Singapore, Singapore
来源
2020 IEEE 33RD INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC) | 2020年
基金
新加坡国家研究基金会;
关键词
CMOS; integrated circuit; intermediate frequency; low-noise amplifier (LNA); radio frequency receiver; ultra-low power;
D O I
10.1109/SOCC49529.2020.9524753
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The recent advancement in biomedical and healthcare sectors shows that the portable ambulatory medical devices with very low power consumption play an important role in continuous monitoring and diagnosis of outpatients by mitigating undesired frequent replacing or recharging of power supply source. To aid this requirement, the fully integrated onchip circuits should consume very little power without compromising on the overall system performance. In this paper, we present a novel ultra-low power dual-stage intermediate frequency low-noise amplifier (IF LNA) operating at 900 MHz designed in TSMC CMOS 40nm technology. The proposed LNA comprises two identical complementary input stages externally matched to 50 Omega at the load and source along with inter-stage matching. Simulation results of the circuit indicate unconditional stability with a power consumption of 112.9 mu W from a 0.56 V supply, a noise figure of 4.66 dB, and a gain of 10.2 dB. The input-referred IP3 is around -17.2 dBm. This work aims to be incorporated in a fully integrated ultra-low-power (ULP) RF receiver in the 2.4 GHz ISM band.
引用
收藏
页码:163 / 167
页数:5
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