Transistor mismatch in 32 nm high-k metal-gate process

被引:1
|
作者
Yuan, X. [1 ]
Shimizu, T. [2 ]
Mahalingam, U. [3 ]
Brown, J. S. [1 ]
Habib, K. [1 ]
Tekleab, D. G. [1 ]
Su, T. -C. [1 ]
Satadru, S. [3 ]
Olsen, C. M. [1 ]
Lee, H. [4 ]
Pan, L. -H. [1 ]
Hook, T. B. [1 ]
Han, J. -P. [5 ]
Park, J. -E. [1 ]
Na, M. -H. [1 ]
Rim, K. [1 ]
机构
[1] IBM Corp, Microelect Div, Hopewell Jct, NY 12533 USA
[2] NEC Elect, Hopewell Jct, NY 12533 USA
[3] Global Foundries, Hopewell Jct, NY 12533 USA
[4] Samsung Elect, Hopewell Jct, NY 12533 USA
[5] Infineon Technol N Amer, Hopewell Jct, NY 12533 USA
关键词
D O I
10.1049/el.2010.0343
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Transistor mismatch data and analysis from state-of-the-art high-k/metal-gate (HKMG) technology are presented. By normalising mismatch data against oxide thickness (T-INV), threshold voltage (V-TH), and effective work function, direct comparison of V-TH mismatch from various device types is made. It is quantitatively demonstrated that effective work function variation (EWFV) does not generate significant V-TH variability in the present HKMG technology.
引用
收藏
页码:708 / U66
页数:2
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