Transistor mismatch in 32 nm high-k metal-gate process

被引:1
|
作者
Yuan, X. [1 ]
Shimizu, T. [2 ]
Mahalingam, U. [3 ]
Brown, J. S. [1 ]
Habib, K. [1 ]
Tekleab, D. G. [1 ]
Su, T. -C. [1 ]
Satadru, S. [3 ]
Olsen, C. M. [1 ]
Lee, H. [4 ]
Pan, L. -H. [1 ]
Hook, T. B. [1 ]
Han, J. -P. [5 ]
Park, J. -E. [1 ]
Na, M. -H. [1 ]
Rim, K. [1 ]
机构
[1] IBM Corp, Microelect Div, Hopewell Jct, NY 12533 USA
[2] NEC Elect, Hopewell Jct, NY 12533 USA
[3] Global Foundries, Hopewell Jct, NY 12533 USA
[4] Samsung Elect, Hopewell Jct, NY 12533 USA
[5] Infineon Technol N Amer, Hopewell Jct, NY 12533 USA
关键词
D O I
10.1049/el.2010.0343
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Transistor mismatch data and analysis from state-of-the-art high-k/metal-gate (HKMG) technology are presented. By normalising mismatch data against oxide thickness (T-INV), threshold voltage (V-TH), and effective work function, direct comparison of V-TH mismatch from various device types is made. It is quantitatively demonstrated that effective work function variation (EWFV) does not generate significant V-TH variability in the present HKMG technology.
引用
收藏
页码:708 / U66
页数:2
相关论文
共 50 条
  • [21] Gate-Stack Engineering to Improve the Performance of 28 nm Low-Power High-K/Metal-Gate Device
    Park, Jeewon
    Jang, Wansu
    Shin, Changhwan
    MICROMACHINES, 2021, 12 (08)
  • [22] A New Method for Enhancing High-k/Metal-Gate Stack Performance and Reliability for High-k Last Integration
    Yew, K. S.
    Ang, D. S.
    Tang, L. J.
    IEEE ELECTRON DEVICE LETTERS, 2013, 34 (02) : 295 - 297
  • [23] Flex-ALD™ lanthanum materials for High-k/Metal-Gate applications
    Ma, Ce
    Kim, Kee-Chan
    McFarlane, Graham
    Athalye, Atul
    2008 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2008, : 82 - 84
  • [24] Reliability of advanced high-k/metal-gate n-FET devices
    Stathis, J. H.
    Wang, M.
    Zhao, K.
    MICROELECTRONICS RELIABILITY, 2010, 50 (9-11) : 1199 - 1202
  • [25] Reliability Characterizations of Display Driver IC on High-k / Metal-Gate technology
    Kim, Donghoon
    Kim, Jungdong
    Bae, Kidan
    Kim, Hyejin
    Hwang, Lira
    Shin, Sangchul
    Park, Hyung-Nyung
    Ku, In-Taek
    Park, Jongwoo
    Pae, Sangwoo
    Lee, Haebum
    2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,
  • [26] The Path Finding of Gate Dielectric Breakdown in Advanced High-k Metal-Gate CMOS Devices
    Chung, Steve
    PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, : 360 - 364
  • [27] Aging-Aware Adaptive Voltage Scaling in 22nm High-K/Metal-Gate Tri-Gate CMOS
    Cho, Minki
    Tokunaga, Carlos
    Khellah, Muhammad M.
    Tschanz, James W.
    De, Vivek
    2015 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2015,
  • [28] Application of Taguchi Method in Designing a 22nm High-k/Metal Gate NMOS Transistor
    Maheran, Afifah A. H.
    Menon, P. S.
    Ahmad, I.
    Shaari, S.
    MICRO/NANO SCIENCE AND ENGINEERING, 2014, 925 : 514 - +
  • [29] Intrinsic Dielectric Stack Reliability of a High Performance Bulk Planar 20nm Replacement Gate High-K Metal Gate Technology and Comparison to 28nm Gate First High-K Metal Gate Process
    McMahon, W.
    Tian, C.
    Uppal, S.
    Kothari, H.
    Jin, M.
    LaRosa, G.
    Nigam, T.
    Kerber, A.
    Linder, B. P.
    Cartier, E.
    Lai, W. L.
    Liu, Y.
    Ramachandran, R.
    Kwon, U.
    Parameshwaran, B.
    Krishnan, S.
    Narayanan, V.
    2013 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2013,
  • [30] 45nm high-k/metal-gate CMOS technology for GPU/NPU applications with highest PFET performance
    Huang, H. T.
    Liu, Y. C.
    Hou, Y. T.
    Chen, R. C-J
    Lee, C. H.
    Chao, Y. S.
    Hsu, P. F.
    Chen, C. L.
    Guo, W. H.
    Yang, W. C.
    Perng, T. H.
    Shen, J. J.
    Yasuda, Y.
    Goto, K.
    Chen, C. C.
    Huang, K. T.
    Chuang, H.
    Diaz, C. H.
    Liang, M. S.
    2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, : 285 - 288