Copper distribution behavior near a SiO2/Si interface by low-temperature (< 400°C) annealing and its influence on electrical characteristics of MOS-capacitors

被引：8

作者：

Hozawa, K ^{[1
]}

Itoga, T ^{[1
]}

Isomae, S ^{[1
]}

Yugami, J ^{[1
]}

Ohkura, M ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan

来源：

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIT.2000.852754

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The Cu re-distribution behavior near a SiO2/Si interface after low-temperature annealing is examined by using total reflection of X-ray fluorescence (TXRF) to simulate the effect of thermal budget in multi-level wiring processes. Cu atoms intentionally adsorbed on backside of the wafers were diffused and were once gettered at the gettering sites during high-temperature drive-in diffusion. However, after low-temperature annealing following the drive-in diffusion, Cu concentration of the Si surface was found to increase even in CZ wafers with intrinsic gettering process (IG). Cu atoms gettered in the vicinity of the SiO2/Si interface after drive-in diffusion are found to readily transport through the SiO2 film and reach the SiO2 surface during 400 degrees C annealing. This transport of Cu is found to cause degradation of thin SiO2 film. The re-distribution phenomenon during low-temperature annealing should be carefully controlled in order to realize highly reliable CMOS devices.

引用

页码：24 / 25

页数：2

Copper distribution behavior near a SiO2/Si interface by low-temperature (&lt; 400°C) annealing and its influence on electrical characteristics of MOS-capacitors

Copper distribution behavior near a SiO2/Si interface by low-temperature (< 400°C) annealing and its influence on electrical characteristics of MOS-capacitors