Ni-based FUSI gates: CMOS Integration for 45nm node and beyond

被引：0

作者：

Hoffmann, T. ^{[1
]}

Veloso, A. ^{[1
]}

Lauwers, A. ^{[1
]}

Yu, H. ^{[1
]}

Tigelaar, H. ^{[1
]}

Van Dal, M. ^{[1
]}

Chiarella, T. ^{[1
]}

Kerner, C. ^{[1
]}

Kauerauf, T. ^{[1
]}

Shickova, A. ^{[1
]}

Mitsuhashi, R. ^{[1
]}

Satoru, I. ^{[1
]}

Niwa, M. ^{[1
]}

Rothschild, A. ^{[1
]}

Froment, B. ^{[1
]}

Ramos, J. ^{[1
]}

Nackaerts, A. ^{[1
]}

Rosmeulen, M. ^{[1
]}

Brus, S. ^{[1
]}

Vrancken, C. ^{[1
]}

Absil, P. P. ^{[1
]}

Jurczak, M. ^{[1
]}

Biesemans, S. ^{[1
]}

Kittl, J. A. ^{[1
]}

机构：

[1] IMEC, Louvain, Belgium

来源：

2006 INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2006年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work reports the first comprehensive evaluation of FUSI gates for manufacturability, covering the key aspects of integration, process control, reliability, matching, device design and circuit-level benefit. Thanks to a selective and controlled poly etch-back process, dual work-function Ni-based FUSI CMOS circuits with record ring oscillator performance (high-V-T applications) have been achieved (17ps at V-DD=1.1V and 20pA/mu m I-off), meeting the ITRS 45nm node requirement for low power CMOS.

引用

页码：9 / +

页数：3

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