InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers

被引：6

作者：

Berg, Martin ^{[1
]}

Persson, Karl-Magnus ^{[1
]}

Wu, Jun ^{[1
]}

Lind, Erik ^{[1
]}

Sjoland, Henrik ^{[1
]}

Wernersson, Lars-Erik ^{[1
]}

机构：

[1] Lund Univ, Dept Elect & Informat Technol, SE-22100 Lund, Sweden

来源：

NANOTECHNOLOGY | 2014年 / 25卷 / 48期

基金：

瑞典研究理事会;

关键词：

nanowire; InAs; mixer; MOSFET; circuit; differential; WRAP-GATE TRANSISTORS; PERFORMANCE; SUBSTRATE; CIRCUITS;

D O I：

10.1088/0957-4484/25/48/485203

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

Integration of III-V semiconductors on Si substrates allows for the realization of high-performance, low power III-V electronics on the Si-platform. In this work, we demonstrate the implementation of single balanced down-conversion mixer circuits, fabricated using vertically aligned InAs nanowire devices on Si. A thin, highly doped InAs buffer layer has been introduced to reduce the access resistance and serve as a bottom electrode. Low-frequency voltage conversion gain is measured up to 7 dB for a supply voltage of 1.5V. Operation of these mixers extends into the GHz regime with a -3 dB cut-off frequency of 2 GHz, limited by the optical lithography system used. The circuit dc power consumption is measured at 3.9 mW.

引用

页数：6