7 kV 4H-SiC GTO thyristors

High Power asymmetric SiC GTOs (Gate Turn-Off Thyristors) were fabricated on n-type 4H-SiC substrates with multiple epi-layers and were tested to investigate breakdown voltage, maximum current density, switching characteristics, and temperature dependences. Comparison of breakdown voltages achieved by GTOs with Guard Ring edge termination and GTOs with a proprietary Junction Termination Extension (JTE) fabricated on the same wafer are made. Individual GTOs with a nominal area of 4 mm(2) (2 mm x 2 mm) utilizing the JTE were tested in forward bias and found to support over 6 kV at leakage currents of less than 5 muA. In addition, GTOs with a nominal area of 0.25 mm(2) (0.5 mm x 0.5 mm) utilizing the JTE were found to support over 7 kV. These blocking voltages are the highest reported for GTOs in SiC. [1-5] Wafer maps of the breakdown voltages for older and newer wafers suggest an improvement of the material. The defect density for the newer wafer is estimated to be greater than the micropipe density. The on-state characteristics are equally impressive, with 4 mm(2) GTOs carrying > 1000 A/cm(2). The GTO has a forward voltage drop of 3.66 V at a current density of 300 A/cm(2) at room temperature and a forward voltage drop of 3.1 V at 300 A/cm(2) at 224 degreesC. This indicates that on-state losses should not be excessive, even at high current densities and high temperatures.