Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes

被引：4

作者：

Ahn, Junwhan ^{[1
]}

Yoo, Sungjoo ^{[2
]}

Choi, Kiyoung ^{[1
]}

机构：

[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul, South Korea

[2] POSTECH, Dept Elect Engn, Pohang, South Korea

来源：

2014 51ST ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2014年

基金：

新加坡国家研究基金会;

关键词：

Hybrid memory cubes; off-chip links; prefetching;

D O I：

10.1145/2593069.2593128

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The Hybrid Memory Cube (HMC) is a 3D-stacked DRAM architecture designed for substantially improved memory bandwidth. In particular, its I/O interface achieves up to 320 GB/s of external bandwidth through high-speed serial links. However, it comes at a cost of large static power of off-chip links, which dominates total power consumption of HMCs. Therefore, we propose an adaptive mechanism to partially disable off-chip links of HMCs with a minimal performance impact. We also present two-level prefetching with in-HMC prefetch buffers to further improve its efficiency in the presence of prefetching. Evaluations show that our scheme reduces energy consumption of HMCs by 51% on average.

引用

页数：6