Towards Budget-Driven Hardware Optimization for Deep Convolutional Neural Networks using Stochastic Computing

被引:3
|
作者
Li, Zhe [1 ]
Li, Ji [2 ]
Ren, Ao [1 ]
Ding, Caiwen [1 ]
Draper, Jeffrey [2 ,3 ]
Qiu, Qinru [1 ]
Yuan, Bo [4 ]
Wang, Yanzhi [1 ]
机构
[1] Syracuse Univ, Dept Elect Engn & Comp Sci, Syracuse, NY 13244 USA
[2] Univ Southern Calif, Dept Elect Engn, Los Angeles, CA 90089 USA
[3] Univ Southern Calif, Informat Sci Inst, Marina Del Rey, CA 90292 USA
[4] CUNY City Coll, Dept Elect Engn, New York, NY 10031 USA
来源
2018 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI) | 2018年
关键词
D O I
10.1109/ISVLSI.2018.00016
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Recently, Deep Convolutional Neural Network (DCNN) has achieved tremendous success in many machine learning applications. Nevertheless, the deep structure has brought significant increases in computation complexity. Large-scale deep learning systems mainly operate in high-performance server clusters, thus restricting the application extensions to personal or mobile devices. Previous works on GPU and/or FPGA acceleration for DCNNs show increasing speedup, but ignore other constraints, such as area, power, and energy. Stochastic Computing (SC), as a unique data representation and processing technique, has the potential to enable the design of fully parallel and scalable hardware implementations of large-scale deep learning systems. This paper proposed an automatic design allocation algorithm driven by budget requirement considering overall accuracy performance. This systematic method enables the automatic design of a DCNN where all design parameters are jointly optimized. Experimental results demonstrate that proposed algorithm can achieve a joint optimization of all design parameters given the comprehensive budget of a DCNN.
引用
收藏
页码:28 / 33
页数:6
相关论文
共 50 条
  • [1] Towards Acceleration of Deep Convolutional Neural Networks using Stochastic Computing
    Li, Ji
    Ren, Ao
    Li, Zhe
    Ding, Caiwen
    Yuan, Bo
    Qiu, Qinru
    Wang, Yanzhi
    2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, : 115 - 120
  • [2] Hardware-Driven Nonlinear Activation for Stochastic Computing Based Deep Convolutional Neural Networks
    Li, Ji
    Yuan, Zihao
    Li, Zhe
    Ding, Caiwen
    Ren, Ao
    Qiu, Qinru
    Draper, Jeffrey
    Wang, Yanzhi
    2017 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN), 2017, : 1230 - 1236
  • [3] DSCNN: Hardware-Oriented Optimization for Stochastic Computing Based Deep Convolutional Neural Networks
    Li, Zhe
    Ren, Ao
    Li, Ji
    Qiu, Qinru
    Wang, Yanzhi
    Yuan, Bo
    PROCEEDINGS OF THE 34TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2016, : 678 - 681
  • [4] Structural Design Optimization for Deep Convolutional Neural Networks using Stochastic Computing
    Li, Zhe
    Ren, Ao
    Li, Ji
    Qiu, Qinru
    Yuan, Bo
    Draper, Jeffrey
    Wang, Yanzhi
    PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2017, : 250 - 253
  • [5] Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks
    Yu, Joonsang
    Kim, Kyounghoon
    Lee, Jongeun
    Choi, Kiyoung
    2017 IEEE 35TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD), 2017, : 105 - 112
  • [6] STOCHASTIC COMPUTING HARDWARE DESIGN AND OPTIMIZATION FOR CONVOLUTIONAL NEUTRAL NETWORKS
    Chen, Zhinan
    Wang, Haoyu
    Xu, Yiming
    Li, Zili
    Zhao, Yudi
    Xiong, Shisheng
    CONFERENCE OF SCIENCE & TECHNOLOGY FOR INTEGRATED CIRCUITS, 2024 CSTIC, 2024,
  • [7] An Efficient Hardware Implementation of Activation Functions Using Stochastic Computing for Deep Neural Networks
    Van-Tinh Nguyen
    Tieu-Khanh Luong
    Han Le Duc
    Van-Phuc Hoang
    2018 IEEE 12TH INTERNATIONAL SYMPOSIUM ON EMBEDDED MULTICORE/MANY-CORE SYSTEMS-ON-CHIP (MCSOC 2018), 2018, : 233 - 236
  • [8] Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications
    Frasser, Christiam F.
    Linares-Serrano, Pablo
    de los Rios, Ivan Diez
    Moran, Alejandro
    Skibinsky-Gitlin, Erik S.
    Font-Rossello, Joan
    Canals, Vincent
    Roca, Miquel
    Serrano-Gotarredona, Teresa
    Rossello, Josep L.
    IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 2023, 34 (12) : 10408 - 10418
  • [9] A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks
    Sim, Hyeonuk
    Lee, Jongeun
    PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2017,
  • [10] Hartley Stochastic Computing For Convolutional Neural Networks
    Mozafari, S. H.
    Clark, J. J.
    Gross, W. J.
    Meyer, B. H.
    2021 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS 2021), 2021, : 235 - 240