On the Operation Modes of Dual-Gate Reconfigurable Nanowire Transistors

被引：15

作者：

Sun, Bin ^{[1
]}

Richstein, Benjamin ^{[1
]}

Liebisch, Patrick ^{[1
]}

Frahm, Thorben ^{[1
]}

Scholz, Stefan ^{[1
]}

Trommer, Jens ^{[2
]}

Mikolajick, Thomas ^{[3
,4
,5
]}

Knoch, Joachim ^{[1
]}

机构：

[1] Rhein Westfal TH Aachen, Inst Semicond Elect, D-52056 Aachen, Germany

[2] NaMLab gGmbH, D-01187 Dresden, Germany

[3] NaMLab gGmbH, D-01187 Dresden, Germany

[4] Tech Univ Dresden, Chair Nanoelect Mat, D-01187 Dresden, Germany

[5] Tech Univ Dresden, Ctr Adv Elect Dresden, D-01062 Dresden, Germany

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2021年 / 68卷 / 07期

关键词：

Electronics packaging; Logic gates; MOSFET; Silicon; Schottky barriers; Nickel; Switches; Electrostatic doping; lift-off; nanowire; program gate at drain (PGAD); program gate at source (PGAS); reconfigurable field-effect transistor (RFET); silicidation; silicon-on-insulator; tetramethylammonium hydroxide (TMAH); SILICON; SOI; FLUCTUATIONS; EVOLUTION; MOSFET;

D O I：

10.1109/TED.2021.3081527

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We investigate the operation modes of a dual-gate reconfigurable field-effect transistor (RFET). To this end, dual-gate silicon-nanowire FETs are fabricated based on anisotropic wet etching of silicon and nickel silicidation yielding silicide-nanowire Schottky junctions at source and drain. We compare the program gate at source (PGAS) with the more usual program gate at drain (PGAD) operation mode. While in PGAD mode, ambipolar operation is suppressed, switching is deteriorated due to the injection through a Schottky barrier. Operating the RFET in PGAS mode yields a switching behavior close to a conventional MOSFET. This, however, needs to be traded off against strongly nonlinear output characteristics for small bias voltages. Our measurement results are supported by transport simulations employing a nonequilibrium Green's function approach.

引用

页码：3684 / 3689

页数：6

共 26 条

[1] Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's
Auth, CP
Plummer, JD
[J]. IEEE ELECTRON DEVICE LETTERS, 1997, 18 (02) : 74 - 76
[2] Björk MT, 2009, NAT NANOTECHNOL, V4, P103, DOI [10.1038/NNANO.2008.400, 10.1038/nnano.2008.400]
[3] Nanoscale device modeling: the Green's function method
Datta, S
[J]. SUPERLATTICES AND MICROSTRUCTURES, 2000, 28 (04) : 253 - 278
[4] De Marchi M, 2012, 2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
[5] The evolution of (001) Si/SiO2 interface roughness during thermal oxidation
Fang, SJ
Chen, W
Yamanaka, T
Helms, CR
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1997, 144 (08) : 2886 - 2893
[6] E(K) RELATION FOR A 2-BAND SCHEME OF SEMICONDUCTORS AND APPLICATION TO METAL-SEMICONDUCTOR CONTACT
FLIETNER, H
[J]. PHYSICA STATUS SOLIDI B-BASIC RESEARCH, 1972, 54 (01): : 201 - 208
[7] Reconfigurable Silicon Nanowire Transistors
Heinzig, Andre
Slesazeck, Stefan
Kreupl, Franz
Mikolajick, Thomas
Weber, Walter M.
[J]. NANO LETTERS, 2012, 12 (01) : 119 - 124
[8] IEEE, 2020, PACK INT WHIT PAP
[9] Kemme SA, 2010, MICROOPTICS AND NANOOPTICS FABRICATION, P1
[10] THE EVOLUTION OF SILICON-WAFER CLEANING TECHNOLOGY
KERN, W
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1990, 137 (06) : 1887 - 1892

← 1 2 3 →