Physically Unclonable Function Using an Initial Waveform of Ring Oscillators

被引:25
作者
Tanamoto, Tetsufumi [1 ]
Yasuda, Shinich [1 ]
Takaya, Satoshi [1 ]
Fujita, Shinobu [1 ]
机构
[1] Toshiba Co Ltd, Corp R&D Ctr, Kawasaki, Kanagawa 2128582, Japan
关键词
Challenge response; physically unclonable function (PUF); ring oscillator;
D O I
10.1109/TCSII.2016.2602828
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A silicon physically unclonable function (PUF) is considered to be one of the key security system solutions for local devices in an era in which the Internet is pervasive. Among many proposals, a PUF using ring oscillators (RO-PUF) has the advantage of easy application to a field-programmable gate array (FPGA). In the conventional RO-PUF, the frequency difference between two ROs is used as one bit of identification (ID). Thus, in order to obtain an ID of long bit length, the corresponding number of RO pairs are required and, consequently, power consumption is large, leading to difficulty in implementing RO-PUF in local devices. Here, we provide an RO-PUF using the initial waveform of the ROs. Because a waveform constitutes a part of the ID, the number of ROs is greatly reduced, and the time needed to generate the ID is finished in a couple of system clocks. We also propose a solution to a change of PUF performance attributable to temperature or voltage change.
引用
收藏
页码:827 / 831
页数:5
相关论文
共 25 条
[1]  
[Anonymous], 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), P100, DOI 10.1109/HST.2010.5513105
[2]  
[Anonymous], 2008, P 3 BEN WORKSH INF S
[3]   A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon [J].
Bossuet, Lilian ;
Xuan Thuy Ngo ;
Cherif, Zouha ;
Fischer, Viktor .
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING, 2014, 2 (01) :30-36
[4]   Utilizing the Variability of Resistive Random Access Memory to Implement Reconfigurable Physical Unclonable Functions [J].
Chen, An .
IEEE ELECTRON DEVICE LETTERS, 2015, 36 (02) :138-140
[5]  
Chen J., 2015, S VLSI TECHN, P40
[6]  
Guajardo J, 2007, LECT NOTES COMPUT SC, V4727, P63
[7]   FPGA PUF based on Programmable LUT Delays [J].
Habib, Bilal ;
Gaj, Kris ;
Kaps, Jens-Peter .
16TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2013), 2013, :697-704
[8]   Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers [J].
Holcomb, Daniel E. ;
Burleson, Wayne P. ;
Fu, Kevin .
IEEE TRANSACTIONS ON COMPUTERS, 2009, 58 (09) :1198-1210
[9]  
Hori Y., 2010, Proceedings 2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010), P298, DOI 10.1109/ReConFig.2010.24
[10]   The butterfly PUF protecting IP on every FPGA [J].
Kumar, Sandeep S. ;
Guajardo, Jorge ;
Maes, Roel ;
Schrijen, Geert-Jan ;
Tuyls, Pim .
2008 IEEE INTERNATIONAL WORKSHOP ON HARDWARE-ORIENTED SECURITY AND TRUST, 2008, :67-+