Creative design of symmetric multilevel converter to enhance the circuit's performance

被引:42
作者
Oskuee, Mohammad Reza Jannati [1 ]
Salary, Ebrahim [1 ]
Najafi-Ravadanegh, Sajad [1 ]
机构
[1] Azarbaijan Shahid Madani Univ, Dept Elect Engn, Smart Distribut Grid Res Lab, Tabriz, Iran
关键词
STACKED MULTICELL; INVERTER TOPOLOGY; VOLTAGE LEVELS; SWITCHES; NUMBER;
D O I
10.1049/iet-pel.2013.0752
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this study, a new symmetric multilevel converter is introduced which is commonly suitable for medium-voltage applications and where higher number of output levels is required. The proposed inverter can generate all levels at the output associated with a lower number of circuit devices including switches and related gate driver circuits for each switch compared with the conventional symmetric cascaded converter, semi-cascaded converter and the recently introduced inverters. Owing to the lower number of circuit devices, the total cost and the installation area are reduced. Another advantage of the proposed inverter over the mentioned topologies is the lower number of on-state switches which causes a reduction on power losses. Simulation and experimental results are presented to validate the practicality of the proposed multilevel structure.
引用
收藏
页码:96 / 102
页数:7
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