STACKED MULTICELL;
INVERTER TOPOLOGY;
VOLTAGE LEVELS;
SWITCHES;
NUMBER;
D O I:
10.1049/iet-pel.2013.0752
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
In this study, a new symmetric multilevel converter is introduced which is commonly suitable for medium-voltage applications and where higher number of output levels is required. The proposed inverter can generate all levels at the output associated with a lower number of circuit devices including switches and related gate driver circuits for each switch compared with the conventional symmetric cascaded converter, semi-cascaded converter and the recently introduced inverters. Owing to the lower number of circuit devices, the total cost and the installation area are reduced. Another advantage of the proposed inverter over the mentioned topologies is the lower number of on-state switches which causes a reduction on power losses. Simulation and experimental results are presented to validate the practicality of the proposed multilevel structure.
机构:
Univ Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, BrazilUniv Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, Brazil
Grigoletto, F. B.
;
Pinheiro, H.
论文数: 0引用数: 0
h-index: 0
机构:
Univ Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, BrazilUniv Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, Brazil
机构:
Univ Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, BrazilUniv Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, Brazil
Grigoletto, F. B.
;
Pinheiro, H.
论文数: 0引用数: 0
h-index: 0
机构:
Univ Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, BrazilUniv Fed Santa Maria, Power Elect & Control Res Grp, BR-97105900 Santa Maria, RS, Brazil