SOI for digital CMOS VLSI: Design considerations and advances

被引：73
作者：
Chuang, CT [1 ]
Lu, PF [1 ]
Anderson, CJ [1 ]
机构：
[1] IBM Corp, Div Res, TJ Watson Res Ctr, Yorktown Heights, NY 10598 USA
来源：
PROCEEDINGS OF THE IEEE | 1998年 / 86卷 / 04期
关键词：
CMOS digital integrated circuits; CMOS integrated circuits; CMOS memory circuits; silicon-on-insulator technology;
D O I：
10.1109/5.663545
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper reviews the recent advances of silicon-on-insulator (SOI) technology for complementary metal-oxide-semiconductor (CMOS) very-large-scale-integration memory and logic applications. Static random access memories (SRAM's), dynamic random access memories (DRAM's), and digital CMOS logic circuits are considered. Particular emphases are placed on the design issues and advantages resulting from the unique SOI device structure. The impact of floating-body in partially depleted devices on the circuit operation, stability, and functionality are addressed. The use of smart-body contact to improve the power and delay performance is discussed, as are global design issues.
引用
收藏
页码：689 / 720
页数：32
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