A 150 GHz Amplifier With 8 dB Gain and+6 dBm Psat in Digital 65 nm CMOS Using Dummy-Prefilled Microstrip Lines

被引：64

作者：

Seo, Munkyo ^{[1
]}

Jagannathan, Basanth ^{[2
]}

Pekarik, John ^{[3
]}

Rodwell, Mark J. W. ^{[1
]}

机构：

[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA

[2] IBM SRDC, Hopewell Jct, NY 12533 USA

[3] ST Microelect, Crolles, France

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2009年 / 44卷 / 12期

关键词：

150 GHz amplifier; 65; nm; amplifiers; CMOS millimeter-wave integrated circuits; dummy modeling; matching loss; metal filling; millimeter-wave integrated circuits; MMICs; pattern density rules; silicon; transmission lines; LOW-NOISE AMPLIFIERS; POWER-AMPLIFIER; WAVE; CIRCUITS; DEVICES; DESIGN;

D O I：

10.1109/JSSC.2009.2032273

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 150 GHz amplifier in digital 65 nm CMOS process is presented. Matching loss is reduced and bandwidth extended by simplistic topology: no dc-block capacitor, shunt-only tuning and radial stubs for ac ground. Dummy-prefilled microstrip lines, with explicit yet efficient dummy modeling, are used as a compact, density-rule compliant matching element. Transistor layout with parallel gate feed yields 5.7 dB of MSG at 150 GHz. Measurement shows the amplifier exhibits 8.2 dB of gain, 6.3 dBm of P-sat, 1.5 dBm of P-1dB and 27 GHz of 3 dB bandwidth, while consuming 25.5 mW at 1.1 V. The dummy-prefilled microstrip line exhibits Q(TL) congruent to 12 up to 200 GHz.

引用

页码：3410 / 3421

页数：12

共 44 条

[1]

[Anonymous], P 33 INT C INFR MILL

[2]

Buckwalter J., 2009, IEEE INT SOL STAT CI, P488

[3]

CATHELIN A, 2008, IEEE 2008 IEEE RFIC, P53

[4] Shielded passive devices for silicon-based monolithic microwave and millimeter-wave integrated circuits [J].

Cheung, TSD ;

Long, JR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (05) :1183-1200

[5]

DEAL WR, P IEEE COMP SEM INT, P1

[6] The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks [J].

Dickson, Timothy O. ;

Yau, Kenneth H. K. ;

Chalvatzis, Theodoros ;

Mangan, Alain M. ;

Laskin, Ekaterina ;

Beerkens, Rudy ;

Westergaard, Paul ;

Tazlauanu, Mihai ;

Yang, Ming-Ta ;

Voinigescu, Sorin P. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (08) :1830-1845

[7] Millimeter-wave CMOS design [J].

Doan, CH ;

Emami, S ;

Niknejad, AM ;

Brodersen, RW .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (01) :144-155

[8] S-PARAMETER-BASED IC INTERCONNECT TRANSMISSION-LINE CHARACTERIZATION [J].

EISENSTADT, WR ;

EO, YS .

IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1992, 15 (04) :483-490

[9]

FUNG A, 2008, IEEE MICROW WIREL CO, V18, P281

[10]

GASKILL S, 2009, IEEE RAD FREQ INT CI, P611

← 1 2 3 4 5 →