High level synthesis with multiple supply voltages for energy and combined peak power minimization

被引：0

作者：

Zhao, Zhen ^{[1
]}

Bian, Jinian ^{[2
]}

Liu, Zhipeng ^{[2
]}

Wang, Yunfeng ^{[2
]}

Zhao, Kang ^{[2
]}

机构：

[1] Peking Univ, Sch Math Sci, Dept Informat Sci, Beijing 100871, Peoples R China

[2] Tsinghua Univ, Dept Comp Sci & Technol, EDA Lab, Beijing 100084, Peoples R China

来源：

2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS | 2006年

基金：

中国国家自然科学基金;

关键词：

low power; high level synthesis; mulptiple supply voltages; ILP; power distribution;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Low-power design is one of the dominant consideration for certain circuits, and energy consumption as well as power distribution are two important measurements. In this paper we propose ILP-based high-level synthesis with multi-cycling and multiple supply voltages scheme, which focuses on energy reduction and combined peak power minimization. Experimental results show that our scheme can efficiently reduce the total energy, and obtain an improved power distribution in both temporal and spatial directions by cycle peak power and module peak power simultaneously optimizing.

引用

页码：864 / +

页数：2

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