Increased Performance of FPGA-Based Color Classification System

被引:4
作者
Cho, Junguk [1 ]
Benson, Bridget [1 ]
Cheamanukul, Sunsern [1 ]
Kastner, Ryan [1 ]
机构
[1] Univ Calif San Diego, Dept Comp Sci & Engn, La Jolla, CA 92093 USA
来源
2010 18TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2010) | 2010年
关键词
AdaBoost; architecture; color classification; FPGA; image processing; Verilog HDL;
D O I
10.1109/FCCM.2010.50
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a hardware architecture for increased performance of color classification. In our architecture, color classification, based on an AdaBoost algorithm, identifies a pixel as having the color of interest or not. We designed the proposed architecture using Verilog HDL and implemented the design in a Xilinx Virtex-5 FPGA. The architecture for color classification can have 598 times performance improvement over an equivalent software solution and 1.9 times performance improvement over the leading hardware color classifier.
引用
收藏
页码:29 / 32
页数:4
相关论文
共 12 条
[1]  
Askar S., 2004, 1 EUROPEAN C VISUAL, P79
[2]  
CHEAMANUNKUL S, 2009, P INT C MULT INT, P79
[3]  
Cho J., 2009, FPGA 09, P103
[4]  
Cho JU, 2007, 2007 IEEE INTERNATIONAL CONFERENCE ON ROBOTICS AND BIOMIMETICS, VOLS 1-5, P172
[5]  
Freund Y, 1999, MACHINE LEARNING, PROCEEDINGS, P124
[6]   A decision-theoretic generalization of on-line learning and an application to boosting [J].
Freund, Y ;
Schapire, RE .
JOURNAL OF COMPUTER AND SYSTEM SCIENCES, 1997, 55 (01) :119-139
[7]  
Jin S., 2009, P ACM SIGDA S FIELD, P283
[8]   Color classification using adaptive dichromatic model [J].
Lu, Xiaohu ;
Zhang, Hong .
2006 IEEE INTERNATIONAL CONFERENCE ON ROBOTICS AND AUTOMATION (ICRA), VOLS 1-10, 2006, :3411-+
[9]   Real-time face detection and tracking for mobile videoconferencing [J].
Paschalakis, S ;
Bober, M .
REAL-TIME IMAGING, 2004, 10 (02) :81-94
[10]  
Reyes N. H., 2006, C AUT ROB AG