A 26.5 GHz silicon MOSFET 2:1 dynamic frequency divider

被引：23

作者：

Wetzel, M ^{[1
]}

Shi, LT

Jenkins, KA

de la Houssaye, PR

Taur, Y

Asbeck, PM

Lagnado, I

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

[2] IBM Res Corp, Yorktown Heights, NY 10598 USA

[3] Space & Naval Warfare Syst Ctr, San Diego, CA 92152 USA

来源：

IEEE MICROWAVE AND GUIDED WAVE LETTERS | 2000年 / 10卷 / 10期

关键词：

CMOS digital integrated circuits; frequency divider; high-speed integrated circuits;

D O I：

10.1109/75.877232

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz, The design is based on n-channel MOSFET's with an effective gate length of 0.1 mum.

引用

页码：421 / 423

页数：3

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