Selective harmonic mitigation with asymmetrical staircase voltage waveform for a three-phase five-level Cascaded H-Bridge Inverter

被引：0

作者：

Schettino, G. ^{[1
]}

Campagna, N. ^{[1
]}

Spataro, C. ^{[1
]}

Di Tommaso, A. O. ^{[1
]}

Miceli, R. ^{[1
]}

Viola, F. ^{[1
]}

机构：

[1] Univ Palermo, Dept Engn, Palermo, Italy

来源：

20TH IEEE MEDITERRANEAN ELETROTECHNICAL CONFERENCE (IEEE MELECON 2020) | 2020年

关键词：

Cascaded H-Bridge multilevel inverter; selective harmonic mitigation; high power applications; EXPERIMENTAL VALIDATION;

D O I：

10.1109/melecon48756.2020.9140573

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Selective harmonics elimination or mitigation strategies are used in all applications where it is necessary to rise the efficiency and reliability of the overall system. This paper presents a simple approach to reduce the low order harmonics amplitude of an asymmetrical staircase voltage waveform for a five-level, three-phase Cascaded H-Bridge Inverter without solving non-linear equations. Through this simple approach, polynomial equations to evaluate the control angels in real-time operations have been found. The effectiveness of the harmonic mitigation method has been tested through the simulation analysis in MatLab/PLECS environment.

引用

页码：13 / 18

页数：6

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