Fault sensitivity and tolerance of successive approximation and Δ-Σ analog-to-digital converters (ADCs)

被引：0

作者：

Singh, M ^{[1
]}

Koren, I ^{[1
]}

机构：

[1] Univ Massachusetts, Dept Elect & Comp Engn, Amherst, MA 01003 USA

来源：

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2003年 / 35卷 / 2-3期

基金：

美国国家科学基金会;

关键词：

Sensitivity Analysis; Fault Tolerance; Good Reliability; Successive Approximation; Critical System;

D O I：

10.1023/A:1024186701830

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sensitive blocks which could then be redesigned for better reliability by incorporating fault tolerance. This paper illustrates the steps involved in incorporating fault tolerance in an ADC. Two redesign techniques to improve the reliability of a circuit are presented. Novel selective node resizing algorithms for increased tolerance against alpha-particle induced transients are discussed.

引用

页码：189 / 197

页数：9

共 8 条

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