On Analysis of Software Interrupt Limiters for Embedded Systems by Means of UPPAAL SMC

The paper deals with a novel method of modeling and analysis of software interrupt managers for event-driven embedded systems by means of the stochastic timed automata and statistical model checking instruments. The above-mentioned system is typically formed of a real-time part expected to produce correct responses and meet all predetermined timing constraints at runtime, even in adverse conditions such as an excessive rate of events caused by interrupts. Because of the asynchronous nature of interrupts, their impact to the system being interrupted must be modeled and analyzed very carefully for various interrupt scenarios - either using classical analytical/formal approaches able to cover systems and interrupts with deterministic behavior or using probabilistic ones able to deal with a stochastic behavior too. The paper is focused on the latter (probabilistic) approaches to show a style of such a modeling and show how and that both the analysis phase of a system can be facilitated and the information about a system behavior under particular configuration/scenarios can be produced using the instruments.