Metal-ferroelectric-semiconductor field-effect transistor NAND gate switching time analysis

被引：3
|
作者：
Phillips, Thomas A. [1 ]
Macleod, Todd C.
Ho, Fat D.
机构：
[1] NASA, George C Marshall Space Flight Ctr, Huntsville, AL 35812 USA
[2] Univ Alabama, Dept Elect & Comp Engn, Huntsville, AL 35899 USA
来源：
INTEGRATED FERROELECTRICS | 2007年 / 89卷
关键词：
MFSFET; FFET; ferroelectric transistor; logic gate; NAND gate;
D O I：
10.1080/10584580601077765
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Previous research investigated the modeling of a NAND gate constructed of n-channel Metal-Ferroelectric-Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate.
引用
收藏
页码：180 / 188
页数：9
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