Asynchronous Java']Java accelerator for embedded Java']Java virtual machine

被引：0

作者：

Liang, Z ^{[1
]}

Plosila, J ^{[1
]}

Sere, K ^{[1
]}

机构：

[1] TUCS, Turku Ctr Comp Sci, FIN-20520 Turku, Finland

来源：

PROCEEDINGS OF THE IEEE 6TH CIRCUITS AND SYSTEMS SYMPOSIUM ON EMERGING TECHNOLOGIES: FRONTIERS OF MOBILE AND WIRELESS COMMUNICATION, VOLS 1 AND 2 | 2004年

关键词：

JVM; bytecode; asynchronous; branch prediction;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose a hardware accelerated Java Virtual Machine (JVM) based on an asynchronous Java accelerator core which can be integrated with any existing processor and operating system. The scheme of this JVM and the architecture of the Java accelerator is presented. The accelerator is targeted especially for low-power applications. It is completely designed using asynchronous (self-timed) circuit technology in which timing is based on local handshake protocols instead of global clocking. Furthermore, it contains a novel branch prediction unit and decoded bytecode cache to minimize the need for external memory access hence reducing the power consumption of the core.

引用

页码：253 / 256

页数：4

共 4 条

[1]

El-Kharashi MW, 2003, 2003 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS, AND SIGNAL PROCESSING, VOLS 1 AND 2, CONFERENCE PROCEEDINGS, P159

[2] Java']Java runtime systems: Characterization and architectural implications [J].