Three-stage transformer-coupled CMOS power amplifier for millimeter-wave applications using 130 nm CMOS technology

被引:5
作者
Mansour, Marwa [1 ]
Mansour, Islam [2 ]
机构
[1] Elect Res Inst ERI, Microelect Dept, Cairo 11843, Egypt
[2] Benha Univ, Shoubra Fac Engn, Elect Engn Dept, Cairo, Egypt
关键词
class-AB; class-C; CMOS; millimeter wave; power amplifiers; quality factor; radio frequency (RF); transmitter; transceiver; transformer coupled; P-SAT; DESIGN; GAIN; PAE;
D O I
10.1002/cta.3363
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-efficiency and high-linearity three-stage transformer-coupled power amplifier (PA) and power combiner for millimeter-wave applications using 130 nm CMOS technology are presented in the paper. The suggested PA uses transformer coupled for input, inter-stage, and output matching networks where the inter-stage matching inductors are utilized to enhance the RF performance. The proposed power amplifier is composed of three stages: first, driver, and power stages. The first stage operates in a class-C to improve the efficiency and decrease power dissipated while a class-AB is used in the driver and power stages to maximize the output power. The proposed PA and power combiner designs are suitable for mm-wave 5G applications. The coupling transformers, inter-stage matching inductors, and output combiner are analyzed and designed using Ansoft high-frequency structure simulator (HFSS) and achieve high-quality factor and high-coupling coefficient over the frequency range from 26 to 33 GHz. The proposed three-stage transformer-coupled power amplifier covers a frequency band from 26 GHz to 33 GHz with a saturated output power of 13.1 dBm, a peak power added efficiency (PAE) equals 19.1%, and a maximum power gain of 13.25 dB. Whereas the proposed power combiner has a saturated output power of 16.3 dBm, a maximum PAE equals 20.5% and a peak gain of 16.5 dB. The proposed three-stage transformer-coupled PA and power combiner consume low power of 65 mW and 128 mW, respectively. Moreover, the adjacent channel power ratios (ACPR) of the proposed PA and power combiner equal -30 dBc and -36 dBc, respectively, for 20 MHz channel bandwidth. Finally, the active areas of the proposed power amplifier and power combiner equal 0.25 mm(2) and 0.69 mm(2), respectively, while the chip areas are 0.55 mm(2) and 1 mm(2), respectively.
引用
收藏
页码:3567 / 3583
页数:17
相关论文
共 35 条
[1]  
Ali SN, 2017, IEEE MTT S INT MICR, P1173
[2]  
[Anonymous], 2017, Spectrum for 4G and 5G
[3]  
Arbabian A., 2008, IEEE ISSCC Dig. Tech. Papers, P196, DOI DOI 10.1109/ISSCC.2008.4523124
[4]   A 40-67 GHz Power Amplifier With 13 dBm PSAT and 16% PAE in 28 nm CMOS LP [J].
Bassi, Matteo ;
Zhao, Junlei ;
Bevilacqua, Andrea ;
Ghilioni, Andrea ;
Mazzanti, Andrea ;
Svelto, Francesco .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015, 50 (07) :1618-1628
[5]  
Bo-An Chen, 2016, 2016 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW), P1, DOI 10.1109/ICCE-TW.2016.7521009
[6]   A dc-11.5 GHz low-power, wideband amplifier using splitting-load inductive peaking technique [J].
Chao, Shih-Fong ;
Kuo, Jhe-Jia ;
Lin, Chong-Liang ;
Tsai, Ming-Da ;
Wang, Huei .
IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2008, 18 (07) :482-484
[7]  
Chen CL, 2017, 2017 IEEE 17TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF), P88, DOI 10.1109/SIRF.2017.7874379
[8]  
Chen P., 2016, 2016 INT S INTEGRATE, P1
[9]   Design Considerations for 60 GHz Transformer-Coupled CMOS Power Amplifiers [J].
Chowdhury, Debopriyo ;
Reynaert, Patrick ;
Niknejad, Ali M. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (10) :2733-2744
[10]   Supply-Scaling for Efficiency Enhancement in Distributed Power Amplifiers [J].
Fang, Kelvin ;
Levy, Cooper S. ;
Buckwalter, James F. .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2016, 51 (09) :1994-2005