An ultra-low power, ±0.3 V supply, fully-tunable Gaussian function circuit architecture for radial-basis functions analog hardware implementation

An ultra-low power (3.9 nW), low supply-voltage (0.6 V) and fully-tunable Gaussian-Bump circuit architecture for hardware-friendly implementation of Kernel functions is presented. The proposed architecture can be used to form hidden neuron cells for analog implementation of Radial Basis Functions in Neural Networks. It consists of only eleven transistors, all operating in sub-threshold. The Gaussian's center, height and width are independently and electronically controlled. The proposed architecture is used as a building block to construct a 2-D Gaussian cascaded Bump structure, demonstrating its dimensional scalability. Proper operation, sensitivity and accuracy are confirmed via theoretical analysis and post-layout simulation results. The presented architectures were realized in TSMC 90 nm CMOS process and were simulated using the Cadence IC Suite.