Low power mixed analog-digital signal processing

被引：3

作者：

Duppils, M ^{[1
]}

Svensson, C ^{[1
]}

机构：

[1] Linkoping Univ, Dept Phys, SE-58183 Linkoping, Sweden

来源：

ISLPED '00: PROCEEDINGS OF THE 2000 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2000年

关键词：

D O I：

10.1109/LPE.2000.876758

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and accumulat tions, is analyzed. An implementation is proposed, composed of switched-capacitor mixed analog/digital multiply-accumulate units in the analog front-end, followed by an A/D converter This implementation is shown to be superior in respect of power consumption compared to an equivalent implementation with a high-speedA/D converter in the front-end, to execute signal processing tasks that include decimation. The power savings are only due to relaxed requirement on A/D conversion rate, as a direct consequence of the decimation. In a case study of a narrowband FIR filter realized with four multiply-accumulate units, and with a decimation factor of 100; power saving is 54 times. Implementation details are given, the power consumption, and the thermal noise are analyzed.

引用

页码：61 / 66

页数：6

共 11 条

[1] CHARGE-TRANSFER MULTIPLYING DIGITAL-TO-ANALOG CONVERTER [J].

ALBARRAN, JF ;

HODGES, DA .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (06) :772-779

[2]

BIYABANI AA, 1999, P IEEE INT SOL STAT, P82

[3]

CHO TB, 1994, P IEEE S LOW POW EL, P70

[4]

DUPPILS M, 1999, P IEEE INT C EL CIRC, P1197

[5]

DUPPILS M, 1999, P MIDW S CIRC SYST A

[6] Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits [J].

Kinget, P ;

Steyaert, M .

PROCEEDINGS OF THE IEEE 1996 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1996, :333-336

[7] A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques [J].

Krishnamurthy, RK ;

Schmit, H ;

Carley, LR .

IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, :499-502

[8] ALL-MOS CHARGE REDISTRIBUTION ANALOG-TO-DIGITAL CONVERSION TECHNIQUES .1. [J].

MCCREARY, JL ;

GRAY, PR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1975, 10 (06) :371-379

[9]

RABAEY JM, 1996, LOW POWER DESIGN MET, P28

[10]

Senderowicz D., 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056), P354, DOI 10.1109/ISSCC.2000.839813

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