Control of tunnel oxide thickness in Si-nanocrystal array memories obtained by ion implantation and its impact in writing speed and volatility

被引:27
作者
González-Varona, O [1 ]
Garrido, B [1 ]
Cheylan, S [1 ]
Pérez-Rodríguez, A [1 ]
Cuadras, A [1 ]
Morante, JR [1 ]
机构
[1] Univ Barcelona, Dept Elect, EME, Barcelona 08028, Spain
关键词
D O I
10.1063/1.1565709
中图分类号
O59 [应用物理学];
学科分类号
摘要
The injection and storage of charge in Si nanocrystals obtained by ion implantation and annealing have been studied for different tunnel oxide thicknesses. The energy of the ions was kept fixed at 15 keV, which is compatible with most ion implanters used in Si technology, and the distance between the Si nanocrystals and the substrate was controlled by using gate oxides with different thicknesses. The processing conditions were adjusted for precipitating all the Si excess and for having Si-SiO2 interfaces free of defects. Consequently, reliable structures were obtained working in the direct tunneling injection regime, which show unprecedented longer retention times. Furthermore, it is shown that by changing only the oxide thickness it is possible to engineer devices with a tradeoff between writing speed and retention time. (C) 2003 American Institute of Physics.
引用
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页码:2151 / 2153
页数:3
相关论文
共 14 条
[1]  
BONAFOS C, 2002, NEOP WORKSH DRESD
[2]   TIME-DEPENDENT POSITIVE CHARGE GENERATION IN VERY THIN SILICON-OXIDE DIELECTRICS [J].
FARMER, KR ;
ANDERSSON, MO ;
ENGSTROM, O .
APPLIED PHYSICS LETTERS, 1992, 60 (06) :730-732
[3]  
Garrido B., 2002, J APPL PHYS, V91, P798
[4]   Charge storage effects in Si nanocrystals embedded in SiO2 thin films [J].
González-Varona, O ;
Garrido, B ;
Pérez-Rodriguez, A ;
Bonafos, C ;
Montserrat, J ;
Morante, JR .
POLYCRYSTALLINE SEMICONDUCTORS IV MATERIALS, TECHNOLOGIES AND LARGE AREA ELECTRONICS, 2001, 80-81 :243-248
[5]  
HANAFI HI, 2001, IEEE T ELECTRON DEV, V48, P874
[6]   SILICON-IMPLANTED SIO2 FOR NONVOLATILE MEMORY APPLICATIONS [J].
HAO, MY ;
HWANG, H ;
LEE, JC .
SOLID-STATE ELECTRONICS, 1993, 36 (09) :1321-1324
[7]  
Hori T., 1992, International Electron Devices Meeting 1992. Technical Digest (Cat. No.92CH3211-0), P469, DOI 10.1109/IEDM.1992.307403
[8]   Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing [J].
Kapetanakis, E ;
Normand, P ;
Tsoukalas, D ;
Beltsios, K ;
Stoemenos, J ;
Zhang, S ;
van den Berg, J .
APPLIED PHYSICS LETTERS, 2000, 77 (21) :3450-3452
[9]   Elucidation of the surface passivation role on the photoluminescence emission yield of silicon nanocrystals embedded in SiO2 [J].
López, M ;
Garrido, B ;
García, C ;
Pellegrino, P ;
Pérez-Rodríguez, A ;
Morante, JR ;
Bonafos, C ;
Carrada, M ;
Claverie, A .
APPLIED PHYSICS LETTERS, 2002, 80 (09) :1637-1639
[10]   Size and location control of Si nanocrystals at ion beam synthesis in thin SiO2 films [J].
Müller, T ;
Heinig, KH ;
Möller, W .
APPLIED PHYSICS LETTERS, 2002, 81 (16) :3049-3051