CORDIC Algorithm for FPGA Implementation

被引：0
|
作者：
Lin, Sun-Ting [1 ]
Wang, Tzu-Hao [1 ]
Lin, Shou-Sheu [2 ]
Li, Yan-Bang [2 ]
机构：
[1] Natl Kaohsiung Normal Univ, Dept Elect Engn, Kaohsiung 824, Taiwan
[2] Natl Kaohsiung First Univ Sci & Technol, Dept Comp & Commun Engn, Kaohsiung, Taiwan
来源：
PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON INTELLIGENT TECHNOLOGIES AND ENGINEERING SYSTEMS (ICITES2013) | 2014年 / 293卷
关键词：
CORDIC; Flatten pipeline; Folded; FPGA;
D O I：
10.1007/978-3-319-04573-3_8
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
For traditional hyperbolic and trigonometric functions calculation algorithms, multiplier and a lookup table are needed to achieve calculation of multiple transcendental functions, which will lead to hardware circuit complexity and lower operation speed. Aim at overcoming the disadvantages of traditional algorithm, a CORDIC algorithm is proposed and implemented by FPGA program. Two types of realization circuits for CORDIC algorithm are implemented into the FPGA and their performances are compared. One is the flatten pipeline and the other is the folded one, while the first performs higher throughput and the last saves more chip area.
引用
收藏
页码：57 / 62
页数：6
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