Design and Development of Phasor Measurement Unit on FPGA

被引:0
作者
Agarwal, Ankit [1 ]
Verma, Nisha [1 ]
Tiwari, Himani [1 ]
Singh, Juhi [1 ]
Maheshwari, Varun [1 ]
机构
[1] Agra Coll, Fac Engn & Technol, Elect & Commun Engn Dept, Agra, Uttar Pradesh, India
来源
2016 IEEE REGION 10 HUMANITARIAN TECHNOLOGY CONFERENCE (R10-HTC) | 2016年
关键词
Communication Module; Concurrent architecture; Field Programmable Gate Arrays; Global Positioning System; Phasor Measurement Unit;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In any electrical transmission and distribution system, measurement of voltage, current and different power are necessarily for smooth functioning of a power system. The magnitude and phasor of these quantities are used in implementing different relays for power system protection, monitoring, control, communicating data to central control station, data logging and self-diagnosis. Phasor Measurement Unit (PMU) is a coordinated measurement technology which provides wide area monitoring, protection and controlling of system. Since electric distribution networks are widely extended, control systems can carry out measurements of electrical quantities simultaneously. A sequential implementation of PMU based on microprocessor/microcontroller increases the time taken in computing the results and it affects the efficiency of the controlling system. In this paper the pipelined architecture based PMU is implemented on Field Programmable Gate Arrays, which senses-processes-communicates at the same time. The PMU is implemented on GENESYS XILINX VIRTEX 5 XC5VLX50T FPGA board with communication facility. Recommended Minimum Specific Global Navigation Satellite System (GPRMC) header is obtained by connecting Global Positioning System (GPS) to the PMU. Results are displayed on hyper terminal with help of Universal Asynchronous Receiver and Transmitter (UART) interface
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页数:6
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