Investigations on the Gate-Induced Drain Leakage Current of Polycrystalline-Silicon Thin-Film Transistor and Its Suppression With Drain Bias Sweep

In this paper, reduction of the gate-induced drain leakage (GIDL) current after drain bias sweeps for p-type polycrystalline-silicon thin-film transistor is reported, which is proposed to be due to local electron generation and trapping near the drain during the drain bias sweep in the kink current region. The reduction of the GIDL current during drain bias sweeps at successively lower gate biases undergoes a two-stage evolution behavior. The mechanism for the two-stage reduction behavior of the leakage current is clarified with the extraction and comparison of the activation energy for the leakage currents before and after the drain bias sweeps. Drain bias sweeps are also found effective in improving the uniformity of the leakage currents.