On-Chip Power Network Optimization with Decoupling Capacitors and Controlled-ESRs

被引：0

作者：

Zhang, Wanping ^{[1
,2
]}

Zhang, Ling ^{[2
]}

Shayan, Amirali ^{[2
]}

Yu, Wenjian ^{[3
]}

Hu, Xiang ^{[2
]}

Zhu, Zhi ^{[1
]}

Engin, Ege ^{[4
]}

Cheng, Chung-Kuan ^{[2
]}

机构：

[1] Qualcomm Inc, 5775 Morehouse Dr, San Diego, CA USA

[2] Univ Calif San Diego, La Jolla, CA USA

[3] Tsinghua Univ, Beijing 100084, Peoples R China

[4] San Diego State Univ, San Diego, CA USA

来源：

2010 15TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2010) | 2010年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we propose an efficient approach to minimize the noise on power networks via the allocation of decoupling capacitors (decap) and controlled equivalent series resistors (ESR). The controlled-ESR is introduced to reduce the on-chip power voltage fluctuation, including both voltage drop and overshoot. We formulate an optimization problem of noise minimization with the constraint of decap budget. A revised sensitivity calculation method is derived to consider both voltage drop and overshoot. The sequential quadratic programming (SQP) algorithm is adopted to solve the optimization problem where the revised sensitivity is regarded as the gradient. Experimental results show that considering voltage drop without overshoot leads to underestimating noise by 4.8%. We also demonstrate that the controlled-ESR is able to reduce the noise by 25% with the same decap budget.

引用

页码：117 / +

页数：2

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