Efficient algorithms for hardware/software partitioning to minimize hardware area

被引:0
|
作者
Wu Jigang [1 ]
Srikanthan, Thambipillai [1 ]
机构
[1] Nanyang Technol Univ, Sch Comp Engn, Ctr High Performance Embedded Syst, Singapore 639798, Singapore
关键词
algorithm; dynamic programming; complexity; hardware/software partitioning; co-design;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Area efficiency is one of the major considerations in constraint aware hardware/software partitioning process. This paper models hardware/software partitioning as an optimization problem with the objective of minimizing area utilization under the constraints of execution time and power consumption. An efficient heuristic algorithm running in O(n log n) is proposed by extending the method solving the 0-1 knapsack problem. Also, an exact algorithm based on dynamic programming is proposed to produce the optimal solution for small-sized problems. Computational results show that the proposed heuristic algorithm yields very good approximate solutions while dramatically reduces the execution time.
引用
收藏
页码:1875 / +
页数:2
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