Performance Evaluation of Matrix Multiplication in Virtual Machine

被引:0
作者
Muhammad, Asif [1 ]
Islam, Muhammad Arshad [1 ]
机构
[1] Capital Univ Sci & Technol, Fac Comp, Islamabad, Pakistan
来源
PROCEEDINGS OF 2017 INTERNATIONAL CONFERENCE ON COMMUNICATION, COMPUTING AND DIGITAL SYSTEMS (C-CODE) | 2017年
关键词
High Performance Computing; Cache; Memory; Matrix Multiplication;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we have examined various implementations of matrix-matrix multiplication using.NET platform. Matrix multiplication is considered one of the basic operation in the field of linear algebra that is used various computer science algorithms. We have used the all loop reordering of traditional n(3) sequential algorithm to analyze its behavior on the.NET common language run-time over more than 10 varying sizes of matrices. Moreover we have also analyzed the blocking version of the traditional multiplication algorithm to observe the cache behavior. We have used Intel CoreiS Arandale 2.53 GHz and Haswell 3.30 GHz processors with dual channel RAM for our experiments. Our experiments show that KIJ and IKJ reordering have performed better than the rest of the loop reordering. Furthermore, blocking implementation of matrix multiplication have not been able to gain significantly on.NET platform. In future, we will utilize task parallel library included in.NET 4.5 to gauge the performance efficiency of linear algebraic operations.
引用
收藏
页码:205 / 210
页数:6
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