Co-simulation virtual platform for reconfigurable multiprocessor hybrid cores development

被引：0

作者：

Astarloa, A ^{[1
]}

Lázaro, J ^{[1
]}

Arias, J ^{[1
]}

Bidarte, U ^{[1
]}

Zuloaga, A ^{[1
]}

机构：

[1] Univ Basque Country, Fac Engn, Bilbao 48013, Spain

来源：

MSV'04 & AMCS'04, PROCEEDINGS | 2004年

关键词：

IP core; SoPC; VHDL simulation; multiprocessor systems; ATA/ATAPI;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

In this paper we present a Virtual Platform that assists to design reconfigurable Multiprocessor Cores that include software and custom hardware sections. The simulation of the latter integration of the Cores into a System-on-Programmable-Chip (SoPC) device will be also covered by the Platform. The environment is built with a set of reusable VHDL described functions, models and automatic test methods. The applicability of this cosimulation approach is exposed with a real application for the development of a autonomous ATA host and FAT processor with two microcontrollers embedded.

引用

页码：17 / 22

页数：6

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