A low-offset class-AB CMOS operational amplifier

被引：0

作者：

Chan, PK ^{[1
]}

Siek, L ^{[1
]}

Tay, HC ^{[1
]}

Su, JH ^{[1
]}

机构：

[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore

来源：

ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL III: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY | 2000年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a novel systematic offset minimization circuit for designing a class-AB CMOS operational amplifier. The proposed structure has a replica-gain circuit, generating a de replica bias to the differential input stage, and providing differential gain as well as level conversion to drive the class-AB output stage. Statistical measurements on 15 samples of the amplifier showed the mean and standard deviation of the input offset were of 0.88mV and 0.49mV respectively. These results were achieved using an active area of only 3700 mu m(2) for the critical differential input stage in a 0.8 um standard CMOS technology.

引用

页码：455 / 458

页数：4

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