A high-speed DAQ framework for future high-level trigger and event building clusters

被引:12
作者
Caselle, M. [1 ]
Perez, L. E. Ardila [1 ]
Balzer, M. [1 ]
Dritschler, T. [1 ]
Kopmann, A. [1 ]
Mohr, H. [1 ]
Rota, L. [1 ]
Vogelgesang, M. [1 ]
Weber, M. [1 ]
机构
[1] Karlsruhe Inst Technol, Inst Data Proc & Elect IPE, Hermann von Helmholtz Pl 1, D-76344 Eggenstein Leopoldshafen, Germany
关键词
Data acquisition concepts; Trigger concepts and systems (hardware and software);
D O I
10.1088/1748-0221/12/03/C03015
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
Modern data acquisition and trigger systems require a throughput of several GB/s and latencies of the order of microseconds. To satisfy such requirements, a heterogeneous readout system based on FPGA readout cards and GPU-based computing nodes coupled by InfiniBand has been developed. The incoming data from the back-end electronics is delivered directly into the internal memory of GPUs through a dedicated peer-to-peer PCIe communication. High performance DMA engines have been developed for direct communication between FPGAs and GPUs using "DirectGMA (AMD)" and " GPUDirect (NVIDIA)" technologies. The proposed infrastructure is a candidate for future generations of event building clusters, high-level trigger filter farms and low-level trigger system. In this paper the heterogeneous FPGA-GPU architecture will be presented and its performance be discussed.
引用
收藏
页数:10
相关论文
共 9 条
[1]  
[Anonymous], CERNLHCC2012016 CMS
[2]  
[Anonymous], VIRT 7 FPGA GEN3 INT
[3]  
ATLAS Collaboration, 2013, Report number: CERN-LHCC-2013-018, ATLAS-TDR-023.
[4]   Use of associative memories for L1 triggering in LHC environment [J].
Biasini, M. ;
Gunnellini, P. ;
Magalotti, D. ;
Nappi, A. ;
Servoli, L. ;
Taroni, S. .
JOURNAL OF INSTRUMENTATION, 2012, 7
[5]   A time-multiplexed track-trigger architecture for CMS [J].
Hall, G. ;
Newbol, D. ;
Pesaresi, M. ;
Rose, A. .
JOURNAL OF INSTRUMENTATION, 2014, 9
[6]  
Mohr H., 2016, COMMUNICATION 0926
[7]  
PCI-SIG®, 2010, PCI EXPR BAS SPEC RE
[8]   A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology [J].
Rota, L. ;
Vogelgesang, M. ;
Perez, L. E. Ardila ;
Caselle, M. ;
Chilingaryan, S. ;
Dritschler, T. ;
Zilio, N. ;
Kopmann, A. ;
Balzer, M. ;
Weber, M. .
JOURNAL OF INSTRUMENTATION, 2016, 11
[9]  
Vogelgesang M., 2016, COMMUNICATION 0410