REAL-TIME H.264 ENCODER IMPLEMENTATION ON A LOW-POWER DIGITAL SIGNAL PROCESSOR

被引：0
|
作者：
Yang, Ming-Jiang [1 ]
Tham, Jo-Yew [1 ]
Rahardja, Susanto [1 ]
Wu, Da-Jun [1 ]
机构：
[1] ASTAR, Inst Infocomm Res, Singapore 138632, Singapore
来源：
ICME: 2009 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO, VOLS 1-3 | 2009年
关键词：
H.264; real-time encoder; scheduling; multicore DSP; embedded media processing;
D O I：
暂无
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
This paper presents a real-time H.264/AVC baseline profile video encoder. The encoder hardware is implemented using a cost-effective, low-power ADI Blackin-561 DSP and related peripherals for real-time video capturing, coding and streaming. The encoder software is developed using a two-stage pipelining framework for efficient parallel video data encoding. A synchronization mechanism with shared memory semaphores is used to schedule the hardware processes and software procedures to acquire the real-time encoding performance. Techniques for reducing the execution time in both stages are also described in this paper. Performance evaluation results verified that the encoder is capable of performing real-time encoding of CIF-resolution and medium-motion VGA-resolution videos, while maintaining good video quality.
引用
收藏
页码：1150 / 1153
页数：4
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