Performance analysis of DSDV and OLSR wireless sensor network routing protocols using FPGA hardware and machine learning

Wireless Sensor Network (WSN) is a self-organized network, contains sensor nodes deployed in particular regions to gather the environmental parameters and communicate the information to the base station directly through intermediate nodes. In recent times, WSN has gained attention from wireless device manufacturers, researchers, and users for remotely accessing and monitoring the information in diverse environments. The scalability and routing are the major concerns of the network. Apart from that, the performance of WSN depends on network simulation parameters such as delay, throughput, packet delivery ratio (PDR), and control overhead. The research paper focused on the DSDV and OLSR routing protocol realization on the new hardware platform. The hardware chip of these protocols is designed in Xilinx ISE 14.7 software using VHDL, targeted on Virtex-5 FPGA. The node communication is verified on Modelsim 10.0 simulation software. The FPGA hardware and timing parameters are analyzed for different node clusters (N = 10, 20 horizontal ellipsis 150) configuration. The OLSR routing protocol network performance parameters are used to build the machine learning prediction model using cluster tree regression, random forest regression, multiple regression, and K-means clustering. The K-means clustering predicted 99.12% and 98.50% accuracy in terms of the packet delivery ratio and throughput respectively.