FPGA Based Digital Filters Design to Remove Noise from ECG Signal

被引:1
|
作者
Bakshi, Amit [1 ]
Panigrahy, Mamata [1 ]
Das, Jitendra Kumar [1 ]
机构
[1] KIIT Deemed Univ, Sch Elect Engn, Bhubaneswar, India
来源
2021 IEEE INTERNATIONAL SYMPOSIUM ON SMART ELECTRONIC SYSTEMS (ISES 2021) | 2021年
关键词
ECG; Baseline Wander (BW); EMG; Savitzky-Golay Filler; Moving Average Filler; Finite Impulse Response (FIR); Field Programmable Gate Array (FPG4);
D O I
10.1109/iSES52644.2021.00061
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
An Electrocardiogram (ECG) is a bioelectrical signal that reflects the state of the heart based on the potential changes in the heart. The ECG signal is a widely used method for the early detection and evaluation of cardiovascular disease (CVD). Different types of noise can contaminate the ECG signal while recording, which can lead to a wrong diagnosis. As a result, a clear ECG signal is essential for effective CVD diagnosis. This paper is about designing an efficient ECG denoising technique using a field programmable gate array (FPGA). To denoise the ECG signal, a High Pass Filter, Moving Average Filter, and Savitzky-Golay Filter is used. The designed filters are tested on different ECG signals taken from the MIT-BIH database by mixing different types of noise and the performance is analyzed using several characteristics such as SNR, MSE, and COR of the filter output signal. The system is implemented using Verilog IIDL and simulated on the Vivado simulator.
引用
收藏
页码:236 / 239
页数:4
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