A New Compact Low-Power High-Speed Rail-to-Rail Class-B Buffer for LCD Applications

This paper addresses a very compact low-power class-B buffer amplifier topology for large-size liquid crystal display applications. The proposed buffer achieves high-speed driving performance, draws a small quiescent current during static operation and offers a rail-to-rail common-mode input range. The circuit provides enhanced slewing capabilities with a limited power consumption by exploiting two current comparators embodied in the input stage, which sense the input signal transients to turn on the output stage transistors. A rail-to-rail stacked mirror differential amplifier is used to amplify the input signal difference and supply the bias voltages for the output stage. Post-layout simulations show that the proposed buffer can drive a 1-nF column line load within 1.8-mu s settling time under a full voltage swing, while drawing only 3.5-mu A static current from a 3-V power supply. Monte Carlo results finally confirm an excellent degree of robustness of the proposed topology.