Comparative assessment of adaptive body-bias SOI pass-transistor logic

被引：0
作者：
Cho, GR
Chen, T [1 ]
机构：
[1] Colorado State Univ, Dept Elect & Comp Engn, Ft Collins, CO 80523 USA
[2] Mindtell Inc, SOC Res & Dev Ctr, Seoul, South Korea
来源：
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2005年 / 42卷 / 03期
关键词：
SOI; DTMOS; pass-transistor logic; low-power; high-speed;
D O I：
10.1007/s10470-005-6756-7
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We present a silicon-on-insulator (SOI) pass-transistor logic (PTL) gate with an active body bias control circuit and compare the proposed PTL gate with other types of PTL gates with different body bias circuits in two different 0.13 mum SOI CMOS technologies. The experimental results show that the proposed SOI PTL gate using the body bias controlled technique is superior in terms of performance and power consumption than other DTMOS PTL gates.
引用
收藏
页码：219 / 229
页数：11
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