A FPGA based ultrasonic rail flaw detection system

被引:0
作者
Li, Wei [1 ]
Zhang, Houxiang [1 ]
机构
[1] Norwegian Univ Sci & Technol, Dept Ocean Operat & Civil Engn, Alesund, Norway
来源
2017 IEEE INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND INFORMATION TECHNOLOGY (ISSPIT) | 2017年
关键词
FPGA; Rail; Ultrasonic testing;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ultrasonic testing is one of the main methods used for rail flaw detection. In order to detect the flaw in different positions in the rail and increase the detecting accuracy, multiple ultrasonic probes are needed. It is difficult for real time detecting when the rail testing vehicle runs at a high speed. In this paper, we present a FPGA (field-programmable gate array) based automatic rail testing system which has multiple transmitting and receiving channels. The real-time signal processing is carried out in the FPGA including filtering and envelop detection. The 2D B-scan image is processed in the host computer for the flaw detection. Currently, the processing system is able to work for a rail testing vehicle with the speed higher than 20 km/h.
引用
收藏
页码:150 / 155
页数:6
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