Chip-scale demonstration of hybrid III-V/silicon photonic integration for an FBG interrogator

被引:53
|
作者
Li, Hongqiang [1 ]
Ma, Xiangdong [1 ]
Cui, Beibei [2 ]
Wang, Youxi [1 ]
Zhang, Cheng [1 ]
Zhao, Junfa [1 ]
Zhang, Zanyun [1 ,3 ]
Tang, Chunxiao [1 ]
Li, Enbang [4 ]
机构
[1] Tianjin Polytech Univ, Sch Elect & Informat Engn, Tianjin Key Lab Optoelect Detect Technol & Syst, Tianjin 300387, Peoples R China
[2] Univ Technol Belfort Montbeliard, UBFC, Syst & Transportat Lab SeT, Res Inst Transportat Energy & Soc IRTES, F-90000 Belfort, France
[3] Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China
[4] Univ Wollongong, Sch Phys, Wollongong, NSW 2522, Australia
来源
OPTICA | 2017年 / 4卷 / 07期
基金
中国国家自然科学基金;
关键词
ON-CHIP; WAVE-GUIDES; SILICON; DEMODULATION; DESIGN; FILTER; LASER; INTERFEROMETER; SPECTROMETERS; PHOTODIODES;
D O I
10.1364/OPTICA.4.000692
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Silicon photonic integration is a means to produce an integrated on-chip fiber Bragg grating (FBG) interrogator. The possibility of integrating the light source, couplers, grating couplers, de-multiplexers, photodetectors (PDs), and other optical elements of the FBG interrogator into one chip may result in game-changing performance advances, considerable energy savings, and significant cost reductions. To the best of our knowledge, this paper is the first to present a hybrid silicon photonic chip based on III-V/silicon-on-insulator photonic integration for an FBG interrogator. The hybrid silicon photonic chip consists of a multiwavelength vertical-cavity surface-emitting laser array and input grating couplers, a multimode interference coupler, an arrayed waveguide grating, output grating couplers, and a PD array. The chip can serve as an FBG interrogator on a chip and offer unprecedented opportunities. With a footprint of 5 mm x 3 mm, the proposed hybrid silicon photonic chip achieves an interrogation wavelength resolution of approximately 1 pm and a wavelength accuracy of about +/- 10 pm. With the measured 1 pm wavelength resolution, the temperature measurement resolution of the proposed chip is approximately 0.1 degrees C. The proposed hybrid silicon photonic chip possesses advantages in terms of cost, manufacturability, miniaturization, and performance. The chip supports applications that require extreme miniaturization down to the level of smart grains. (C) 2017 Optical Society of America
引用
收藏
页码:692 / 700
页数:9
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